Alexander Züpke

About Me

Hi, I'm Alex Züpke!

My lastname is spelled Zuepke without umlauts and pronounced tsuup-keh, ツーップケ, or Цюпке.
The long form of my firstname is Alexander, but just call me Alex.

My fields of interests are operating systems and synchronization mechanisms, but I'm also interested in predictability aspects of CPU microarchitectures.
I did a PhD thesis on predictable and efficient low-level synchronization mechanisms and OS design patterns for partitioning microkernels.

Since January 2021, I'm a PostDoc at the real-time group of Prof. Marco Caccamo at TUM.

Besides academia, I'm the VP of Engineering at Minerva Systems SRL.

Between 2012 and 2020, I was at the OS research group of Robert Kaiser at HSRM.

From 2003 to 2020, I was working on the PikeOS operating system at SYSGO GmbH.

Publications

My publications (as author or co-author):

D. Ferraro, A. Bastoni, A. Zuepke, A. Marongiu. Enabling Security on the Edge: A CHERI Compartmentalized Network Stack. DATE 2025 (to appear)
I. Izhbirdeev, D. Hoornaert, W. Chen, A. Zuepke, Y. Hammad, M. Caccamo, R. Mancuso. Coherence-Aided Memory Bandwidth Regulation. RTSS 2024 [Best Paper Award] [PDF] [DOI]
T. Betz, L. Wen, F. Pan, G. Kaljavesi, A. Zuepke, A. Bastoni, M. Caccamo, A. Knoll, J. Betz. A Containerized Microservice Architecture for a ROS 2 Autonomous Driving Software: An End-to-End Latency Evaluation. RTCSA 2024 [PDF] [arXiv] [DOI]
A. Zuepke, A. Bastoni, W. Chen, M. Caccamo, R. Mancuso. MemPol: Polling-based Microsecond-scale Per-core Memory Bandwidth Regulation. Real-Time Systems, Volume 60, 2024 [preprint] [DOI]
M. Foughali, P.-E. Hladik, A. Zuepke. Compositional Verification of Embedded Real-Time Systems. Journal of Systems Architecture, Volume 142, September 2023 [preprint] [DOI]
A. Zuepke, A. Bastoni, W. Chen, M. Caccamo, R. Mancuso. MemPol: Policing Core Memory Bandwidth from Outside of the Cores. RTAS 2023 [PDF] [DOI]
M. Foughali, A. Zuepke. Formal Verification of Real-Time Autonomous Robots: an Interdisciplinary Approach. Frontiers in Robotics and AI, Volume 9, 2022 [DOI]
G. Schwäricke, R. Tabish, R. Pellizzoni, R. Mancuso, A. Bastoni, A. Zuepke, M. Caccamo. A Real-Time virtio-based Framework for Predictable Inter-VM Communication. RTSS 2021 [PDF] [DOI]
A. Züpke. Efficient and Predictable Thread Synchronization Mechanisms for Mixed-Criticality Systems on Shared-Memory Multi-Processor Platforms. Dissertation for Dr. rer. nat. 2021 [PDF] [URN]
A. Zuepke. Turning Futexes Inside-Out: Efficient and Deterministic User Space Synchronization Primitives for Real-Time Systems with IPCP. ECRTS 2020 [PDF] [DOI]
A. Zuepke, R. Kaiser. Deterministic Futexes: Addressing WCET and Bounded Interference Concerns. RTAS 2019 [PDF] [DOI]
A. Zuepke, R. Kaiser. Deterministic Futexes Revisited. OSPERT Workshop 2018 [PDF]
A. Kohn, K. Schmidt, J. Decker, M. Sebastian, A. Züpke, A. Herkersdorf. Timing Analysis for Hypervisor-based I/O Virtualization in Safety-Related Automotive Systems. SAE WCX 2017 [DOI]
A. Zuepke, K. Beckmann, A. Zoor, R. Kroeger. For Safety and Security Reasons: The Cost of Component-Isolation in IoT. JLST 2016 [DOI]
A. Züpke, K. Beckmann, A. Zoor, R. Kröger. Kosten der Abschirmung von Code und Daten. Echtzeit 2016 [DOI]
A. Zuepke, M. Bommert, D. Lohmann. AUTOBEST: A United AUTOSAR-OS and ARINC 653 Kernel. RTAS 2015 [PDF] [DOI]
A. Zuepke, M. Bommert, R. Kaiser. Fast User Space Priority Switching. OSPERT Workshop 2014 [PDF]
A. Zuepke. Thread Migration for Mixed-Criticality Systems. RTAS Work-in-Progress Session 2014 [PDF]
A. Züpke. Deterministic Fast User Space Synchronization. OSPERT Workshop 2013 [PDF]
R. Kaiser, S. Wagner, A. Zuepke. Safe and Cooperative Coexistence of a SoftPLC and Linux. Real-Time Linux Workshop 2006 [PDF] [ext]
A. Züpke. Linux-Portierung auf den P4 Mikrokernel. Diploma Thesis for Dipl.-Ing. (FH) 2003 [PDF]

Professional Activities

PC activity: ECRTS 2025, RTAS 2025 Brief Presentations, DATE 2025 E2 track and LBR, RTCSA 2024, OSPERT 2024 (chair), RTAS 2024 Brief Presentations, ECRTS Real-Time Pitches (chair), OSPERT 2023 (co-chair), RTAS 2023, RTAS 2022.

Reviewer: Journal of Systems Architecture, Real-Time Systems, Transactions on Embedded Computing Systems, Transactions on Computers.

Software

https://gitlab.com/azuepke/mempol MemPol implementation for 64-bit Arm chips (AMD/Xilinx Zynq UltraScale+, NXP i.MX8M, NXP S32G2).
https://gitlab.com/azuepke/bench Memory performance benchmark and stress test for Arm and RISC-V platforms. Quick assessment of the sustainable memory bandwidth on the platform, see MemPol 2024 journal paper.
https://gitlab.com/azuepke/llab Lock-less array-based multi-resource locks from the Frontiers 2022 paper.
https://github.com/Minervasys/jailhouse fork of the Jailhouse hypervisor with extensions for memory-isolation.
https://github.com/Minervasys/jailhouse-documentation Additional documentation and configuration files for Jailhouse.

Contact

Contact me via email: blexi <ät> web <pünktchen> de or alex <pünktchen> zuepke <ät> tum <pünktchen> de (btw, "Pünktchen" means "point, dot" in German).
Or on Linkedin

Last updated: 2024-12-19.